The present invention is directed to nanostructured thermoelectric elements and the like, and a method for enhancement thereof, namely by combining layer-by-layer assembly of silica or mesoporous silica precursors or other suitable compounds within ordered nanoporous templates, then upon nanowire growth, removal of the template followed by layer-by-layer growth thermoelectric material in the voids; thereby creating a thermoelectric support. These hierarchical templates can be either fabricated freestanding or fabricated directly on support materials such as electrically conductive or insulating material. Furthermore, inclusion of material within the hierarchical nanopores facilitates the directed fabrication of ultra-high aspect ratio nanostructures.
In the primary currently preferred first embodiment, the composite thermoelectric laminates according to the present invention can increase the total power output of a thermoelectric device. In addition, a new process fabricates conformal (or conformable) thermoelectric nanowire arrays embedded within a composite thermoelectric matrix, which are grown on any shaped support when s the initial support is composed of aluminum, zinc, tin, antimony, titanium, magnesium, niobium, tantalum or any other metal that undergoes electrochemical formation of ordered nanopores. The materials listed are known producers of arrayed nanopores under anodic electrochemical oxidation (abbreviated hereto forth as “anodization” or “anodized”). In another contemplated embodiment, the advantages of these nanostructures can be leveraged in applications where ultra high surface area, vertically oriented and arrayed nanostructures are desired such as in batteries, capacitors, electrochemistry, chemical conversion, photovoltaic devices and many other chemical and physical applications as will be apparent to those skilled in such applications.
In a thermoelectric material, the redistribution of charge carriers is simultaneously associated with the formation of an electric field and a temperature gradient. Thus, the external application of a thermal gradient across the material results in the formation of an electrical bias. Likewise, an externally applied bias across the thermoelectric will cause heat to flow through the material. The degree that a particular material responds to either imposition is measured by the material's thermoelectric figure of merit, zT
                    zT        =                              σ            ⁢                                                  ⁢                          S              2                        ⁢                          T              av                                                          κ              e                        +                          κ              l                                                          (        1        )            where σ, S, κe, κl and Tav are the thermoelectric material's electrical conductivity, Seebeck coefficient, thermal conductivity due to electrons and phonons (lattice contribution), and average temperature, respectively. Thermoelectric efficiency increases with both zT in Equation. (1) and the Carnot efficiency (′c=1j Tcold=Thot), which is given by the ratio of temperatures from heat-source to heat-sink.
Theoretical calculations show the immense potential that ultra-low diameter nanostructures can have on zT. [see, e.g., Hicks and Dresselhaus; Thermoelectric figure of merit of a one-dimensional conductor. Phys. Rev. B, 1993, (47), 16631-16634]. Such calculations show, however, that significant enhancements in zT are only observed once the confinement length (i.e. nanowire diameter) drops below 20 nm. Only at dimensions below 10 nm is the nanostructure confinement on the order of or less than that of the phonon wavelength. A 100-fold increase in phonon scattering has been found as nanowire diameter decreased from 20 to 1 nm, while electron scattering only decreased by a factor of 2. [see, Kim, Stroscio, Bhatt, Mickevicius and Mitin; Electron-Optical-Phonon Scattering Rates in a Rectangular Quantum Wire. J. Appl. Phys., 1991, (70), 319-325]. Therefore, achieving zT, 4 likely requires nanostructures with diameters less than 5 nm.
It is possible to reduce the diameter of the AAO below its natural lower limit by incorporation of other materials within or on the walls of the AAO pores. This has been accomplished through filling the AAO pores with mesoporous silica, coating the AAO pores with mesoporous silica [see, Hill, Cotton and Ziegler; Alignment and Morphology Control of Ordered Mesoporous Silicas in Anodic Aluminum Oxide Channels by Electrophoretic Deposition. Chem. Mater., 2009, (21), 1841-1846], or layer-by-layer deposition on the AAO template [see Liu, Wang, Indacochea and Wang; Interference color of anodized aluminum oxide (AAO) films for sensor application, Sensors and Smart Structures Technologies for Civil, Mechanical, and Aerospace Systems 2009, 2009, (7292), 729217-11]. Furthermore, the fabrication of thermoelectric nanostructures within ultra-low diameter nanopores has been predicted and partially verified to substantially enhance factors contributing to thermoelectric performance.
While ultra-low diameter nanowires show significant increase in zT, the low diameters limit the maximum power output of the device. The total power output of a thermoelectric device is the power factor (or PF),PF=S2σwhere S and σ are the Seebeck coefficient and electrical conductivity respectively. PF is very similar to zT but does not account for the thermal conductivity of the thermoelectric material, as this is only a factor in efficiency. The PF is instead representative of the amount of energy that can be produced by the device. Increasing the PF of a nanostructured thermoelectric device will allow for greater energy generation in applications where maximum energy needs to be produced from an excess of heat.
A primary object of the present invention is the ability to increase the thermoelectrically active area of the device beyond the area of the nanowires. This has been accomplished by selectively removing the AAO template following wall coating of the nanostructures (henceforth referred to as the pore size reduction medium [PRM]) and filling of nanostructures with thermoelectric material. This freestanding nanostructure can then be supported by filling the nanoscale void with thermoelectric material, thereby increasing the total power output of the device.